Next ISSCC Conference Scheduled for February 2026

The IEEE International Solid State Circuits Conference (ISSCC) will take place in February 2026 in San Francisco, and once again it is shaping up to be one of the most influential technical events for the global semiconductor industry. The annual conference will span five days and feature a comprehensive collection of research papers and presentations from major companies, research institutions and universities worldwide. The official program, covers a wide array of advanced semiconductor disciplines, with several high profile memory related papers drawing significant attention.

As part of the DRAM and memory segment, SK hynix is preparing to unveil its latest achievements in GDDR7, LPDDR6, and other emerging DRAM technologies. One of the most notable disclosures will be the company’s 48 Gbps GDDR7 implementation featuring 24 Gb densities. This represents a substantial leap beyond previously published roadmaps and introduces a new performance tier for graphics and AI focused memory. SK hynix’s solution utilizes a symmetric 2 channel mode architecture with clock path optimization and enhanced RAS features. At these speeds, a single GDDR7 device delivers up to 192 GB per second of bandwidth, representing more than a 70 percent improvement over today’s 28 Gbps GDDR6 dies that peak at 112 GB per second. While commercial GPUs adopting such speeds will take time to appear, this research underscores the long term scaling path for next generation graphics accelerators.

In parallel, SK hynix will also present its 1cnm LPDDR6 solution supporting 14.4 Gbps speeds with 16 Gb densities, targeting future mobile SoCs, high performance automotive platforms and AI edge applications. Samsung will contribute its own LPDDR6 paper detailing 12.8 Gbps performance at the same 16 Gb density class, offering an additional perspective on the architectures and process technologies shaping the next mobile memory generation.

Samsung will also deliver one of the event’s most anticipated announcements in the high bandwidth memory category with its HBM4 research paper. This design showcases 36 GB capacity per stack using a 12 high configuration, capable of delivering up to 3.3 TB per second of bandwidth. Samsung’s HBM4 is expected to support NVIDIA’s Vera Rubin AI accelerators, which demand higher bandwidth and larger memory footprints to meet the requirements of next generation training and inference workloads.

Graphics Memory	GDDR7	GDDR6X	GDDR6	GDDR5X
Main Workload	Gaming, AI	Gaming, AI	Gaming, AI	Gaming
Example GPU Platform	GeForce RTX 5090	RTX 4090	RTX 2080 Ti	GTX 1080 Ti
Die Capacity	16–64 Gb	8–32 Gb	8–32 Gb	8–16 Gb
Gb/s per Pin	28–48	19–24	14–16	11.4
GB/s per Placement	112–192	76–96	56–64	45
GB/s per System	1536–2304	912–1152	672–768	547
Frame Buffer	24–36 GB	24 GB	12 GB	12 GB
Package	266 BGA	180 BGA	180 BGA	190 BGA

Beyond memory, ISSCC 2026 will include extensive sessions covering processors, interconnects, die to die communication, mm Wave and sub THz system design, advanced analog circuits, optical transceivers, display technologies, power management, compute in memory architectures, AI accelerators, and a wide spectrum of experimental and domain specific circuits. Companies such as Intel, AMD and NVIDIA will also present their latest research across compute, interconnect and emerging semiconductor technologies, making the conference an essential venue for understanding the direction of next generation system design.

The conference continues to reflect the rapidly expanding demands placed on the semiconductor industry across AI, mobile, graphics, automotive and enterprise computing. As memory bandwidth, capacity and efficiency become increasingly critical for future system performance, the disclosures from SK hynix and Samsung highlight the accelerating pace of DRAM and HBM innovation leading into 2026 and beyond.

Are you following ISSCC this year, and which memory technology are you most eager to see progress further? Share your thoughts below.