NVIDIA Vera Rubin Packs 74.7 TB of DRAM as AI Memory Costs Surge

NVIDIA's Vera Rubin architecture is demonstrating just how dramatically memory has become one of the largest costs in modern artificial intelligence infrastructure. A new UBS bill of materials analysis obtained by ChosunBiz estimates that memory related components represent approximately 62% of the cost attributed to a Vera Rubin Superchip, rising from an estimated 53% with the previous Blackwell Ultra generation. The analysis estimates a Vera Rubin Superchip cost of approximately 38,902$, with 24,297$ associated with HBM4 and SOCAMM2 memory. UBS reportedly calculates that overall platform cost has increased around 2.1 times from the previous generation while memory expenses have increased approximately 2.5 times.

The enormous increase becomes easier to understand when looking at the official NVIDIA Vera Rubin NVL72 specifications. Each Rubin GPU integrates 288 GB of HBM4 delivering up to 22 TB/s of bandwidth, while each Vera CPU supports up to 1.5 TB of LPDDR5X memory using SOCAMM modules with as much as 1.2 TB/s of CPU memory bandwidth. A complete NVL72 rack combines 72 Rubin GPUs with 36 Vera CPUs, resulting in 20.7 TB of HBM4 and 54 TB of LPDDR5X. Combined, a single rack contains approximately 74.7 TB of directly attached DRAM before accounting for storage and other supporting infrastructure.

The UBS estimates place HBM4 associated with a Rubin GPU at approximately 4,943$, while SOCAMM2 memory attached to the Vera CPU is estimated at approximately 19,355$. This makes CPU side LPDDR5X an unexpectedly large contributor to the platform's memory expenditure. NVIDIA's architecture helps explain why. Vera is not simply a conventional host CPU attached to accelerators. Its 88 Olympus cores, large LPDDR5X memory subsystem, and 1.8 TB/s NVLink C2C connection are designed to participate directly in data movement, orchestration, scheduling, KV cache management, and other workloads required to keep Rubin GPUs operating efficiently.

There is, however, an important detail surrounding the reported 62% figure. NVIDIA officially defines each Vera Rubin Superchip as 2 Rubin GPUs paired with 1 Vera CPU, while the published UBS breakdown assigns 4,943$ to HBM4 and 19,355$ to SOCAMM2 when calculating the 24,297$ memory subtotal. If the 4,943$ HBM4 estimate applies to each individual Rubin GPU, 2 HBM4 allocations would theoretically need to be included in a complete Superchip. Without access to UBS's original methodology and component definitions, the exact percentage cannot be independently reconciled. The broader conclusion remains unchanged, however: memory represents an enormous portion of the hardware investment required by Vera Rubin.

The scale is especially striking on the CPU side. A single NVL72 rack contains 54 TB of LPDDR5X attached to its 36 Vera CPUs. Using a premium smartphone equipped with approximately 12 GB of LPDDR memory as a reference point, that represents roughly the amount of DRAM contained in 4,500 smartphones concentrated inside a single AI rack. The Rubin GPUs contribute another 20.7 TB of considerably more expensive HBM4, demonstrating why AI infrastructure is simultaneously placing pressure on both conventional DRAM production and advanced High Bandwidth Memory capacity.

This also connects directly with NVIDIA's effort to diversify its memory supply chain. Previous reports NVIDIA is bringing Nanya Technology into the Vera Rubin LPDDR5X supply chain, alongside established suppliers working on SOCAMM technology. Vera Rubin's massive CPU memory requirements mean LPDDR5X availability is becoming strategically important alongside HBM4, particularly as NVIDIA prepares larger deployments across cloud providers and AI factories.

The pressure extends across the wider memory market. SK hynix has warned that 2027 could become the industry's worst memory supply year, while demand from AI companies continues absorbing HBM, server DRAM, LPDDR, NAND Flash, manufacturing capacity, and advanced packaging resources. SK hynix has also formed a multiyear partnership with NVIDIA covering HBM4 and future AI memory technologies, illustrating how securing memory supply has become almost as strategically important as securing accelerator production itself.

NVIDIA nevertheless argues that the higher hardware complexity delivers substantially better economics once the systems are operating. The company says Vera Rubin NVL72 can provide up to 10 times higher inference throughput per megawatt and up to 10 times lower cost per token than GB200 NVL72 under selected long context reasoning workloads. In other words, Vera Rubin may be significantly more expensive at the component level, but NVIDIA is betting that dramatically higher utilization and token throughput will lower the effective cost of running large AI models.

Vera Rubin makes one of the most important changes in AI hardware increasingly visible: memory is no longer a supporting component sitting beside the processor. It is becoming one of the defining economic and architectural constraints of the entire platform.

HBM4 receives much of the attention because of its extreme bandwidth and advanced packaging requirements, but Vera Rubin shows that CPU memory can become equally important. Placing 1.5 TB of LPDDR5X beside every Vera CPU means an NVL72 rack consumes 54 TB of LPDDR5X before its 20.7 TB of HBM4 is even considered. Multiply that requirement across thousands of AI racks and the impact on global DRAM production becomes substantial.

This is also why the current memory shortage cannot be explained by gaming PCs, smartphones, or ordinary servers alone. AI infrastructure is consuming memory at a completely different scale, and Vera Rubin represents the next escalation. For memory manufacturers, that creates enormous opportunity. For everyone competing for the same wafer capacity, it creates another reason to expect supply and pricing pressure to remain part of the hardware market for years.

With a single NVIDIA Vera Rubin NVL72 rack carrying approximately 74.7 TB of DRAM, do you think memory rather than GPU production will become the biggest bottleneck limiting future AI expansion?