NVIDIA Rubin Expected to Retain 12 Layer HBM4 as Memory Prices Could Surge 121% in 2027
NVIDIA's Rubin AI accelerators are expected to retain their 12 layer HBM4 memory configuration, despite earlier reports suggesting a transition toward smaller 8 layer stacks. According to DIGITIMES, citing Counterpoint Research, most Rubin products will continue using higher capacity memory stacks as AI infrastructure demand intensifies. Meanwhile, TrendForce forecasts a 121% increase in blended HBM average selling prices during 2027, reflecting persistent supply shortages and growing adoption of more expensive memory technologies.
The report contrasts with earlier information from ZDNet Korea, which suggested NVIDIA had requested Samsung and SK hynix to increase production of 8 layer HBM4 during the second half of 2026. The reported adjustment was linked to thermal management, manufacturing yields, and supply constraints associated with stacking 12 DRAM dies. However, increasing purchases of 8 layer products does not necessarily mean NVIDIA intends to replace the higher capacity configuration across its entire accelerator lineup.
NVIDIA's official Rubin architecture documentation specifies 12 layer HBM4 stacks, delivering up to 288 GB of memory and 22 TB/s of bandwidth per GPU. These specifications are central to the Vera Rubin platform's AI computing capabilities, particularly for large language models, extended context processing, and demanding inference workloads where memory capacity and bandwidth directly influence performance.
HBM4 8 Layer vs 12 Layer Comparison
| Specification | HBM4 8 Layer | HBM4 12 Layer |
|---|---|---|
| Stacked DRAM Dies | 8 | 12 |
| Capacity per Stack | 24 GB | 36 GB |
| Capacity with 8 Stacks | 192 GB | 288 GB |
| Interface Width per Stack | 2,048 bit | 2,048 bit |
| Packaging Complexity | Lower | Higher |
| Estimated 2027 Price per Gb | 10% to 20% higher | Baseline |
Capacity assumes 24 Gb DRAM dies and 8 stacks per GPU. The 192 GB configuration is illustrative, not an announced Rubin product. Pricing differences are TrendForce projections.
Although reducing stack height requires fewer DRAM dies and can simplify manufacturing, it does not guarantee lower memory costs per gigabit. Every HBM stack requires a base die responsible for communication with the processor, and that cost must be distributed across fewer memory layers in an 8 layer configuration.
As explained in Chips and Cheese's technical analysis, advanced HBM4 base dies increasingly rely on sophisticated logic manufacturing processes to improve power efficiency and manage growing interface complexity. This contributes to the cost structure of modern HBM, particularly as manufacturers introduce wider interfaces and more demanding packaging technologies.
TrendForce expects 8 layer HBM to become increasingly attractive as manufacturers attempt to maximize accelerator output from limited DRAM supply. Its October 16 market outlook suggests 12 layer HBM4 will remain dominant during the first half of 2027, while 8 layer configurations could gain substantial market share later in the year, potentially including NVIDIA's Rubin Ultra generation.
The projected 121% increase in HBM average selling prices also requires context. TrendForce is forecasting an increase in the blended market average, not a uniform 121% price hike for every HBM product. The estimate reflects the growing contribution of premium HBM4, the expected introduction of HBM4E during the second half of 2027, and continuing supply limitations.
With Samsung, SK hynix, and Micron expanding advanced memory production, manufacturers face increasing pressure to balance capacity, packaging yields, and production costs. As HBM continues competing with conventional DRAM for semiconductor manufacturing resources, the consequences could extend beyond AI accelerators into server memory and consumer hardware availability.
NVIDIA's expected decision to retain 12 layer HBM4 for Rubin demonstrates how critical memory capacity has become in modern AI hardware. Reducing stack height may improve manufacturing efficiency, but sacrificing 96 GB of memory per GPU in an equivalent 8 stack configuration could introduce substantial limitations for large AI models and memory intensive inference workloads.
The more significant development is the growing cost of advanced memory. With base dies, sophisticated packaging, and manufacturing yields increasingly affecting profitability, HBM suppliers must optimize production rather than simply increase stacking density.
For the broader hardware market, continued HBM shortages could sustain pressure on conventional DDR5 and server DRAM supply. Even if 8 layer configurations help manufacturers deliver more AI accelerators, meaningful price relief for PC builders remains uncertain.
Should NVIDIA prioritize the maximum 288 GB HBM4 capacity for Rubin, or would a lower capacity configuration be a better compromise if it improved production availability and reduced overall accelerator costs?
