Intel CEO Lip Bu Tan Signals New Memory Push as CPU and Memory Stacking Becomes a Strategic Focus

Intel CEO Lip Bu Tan has provided one of the clearest indications yet that the company is exploring a deeper return to memory technology, revealing that new memory architectures have become one of his personal projects while discussing the possibility of tightly integrating memory with future CPUs through advanced stacking. Speaking during the TechSurge Deep Tech Podcast, Tan explained that his view of the memory industry has changed substantially as artificial intelligence creates new requirements around capacity, bandwidth, power efficiency, packaging, and data movement. However, Intel has not announced a return to conventional DRAM manufacturing, making the comments an indication of strategic exploration rather than confirmation of a new commercial memory business.

"I think there's a lot of ways we can really do stacking together, and also try to find some new architecture for memory."
— Quote by: Lip Bu Tan

Tan explained that memory was previously an area he avoided investing in because it behaved largely as a commodity business, but he believes the economics and technological requirements have now changed. AI systems increasingly depend on moving enormous quantities of data between processors and memory, creating opportunities for architectures that bring compute and memory closer together rather than treating DRAM as a relatively independent component. The Intel CEO described new memory architecture as a personal area of interest and suggested that Intel is considering requirements across short, medium, and long term development cycles.

"One of my pet projects is looking at some of the memory new architecture."
— Quote by: Lip Bu Tan

The comments are particularly significant because Intel began life as a memory company. Intel's own corporate history records that the company became an early leader in semiconductor memory before competitive pressure eventually pushed it toward processors. In 1985 Intel made the decision to stop producing DRAM, accelerating the transition that would eventually establish x86 processors as the center of its business. A future memory initiative would therefore represent a return to one of Intel's original technological foundations more than 40 years later, although it may look very different from the commodity DRAM manufacturing business Intel abandoned.

Another major signal is Intel's recruitment of former SK hynix CEO Seok Hee Lee. Intel officially appointed Lee as Executive Vice President of Intel Foundry in June 2026, placing him in charge of advanced packaging, system integration, back end technology development, and back end manufacturing. Intel specifically said Lee will help strengthen its ability to tightly couple logic, memory, networking, and other components into high performance computing systems. His experience is particularly relevant because SK hynix has become one of the most important companies in advanced DRAM and High Bandwidth Memory during the AI infrastructure boom.

Tan directly referenced Lee during his memory discussion, effectively acknowledging that the appointment provides some indication of what he is considering internally. That does not necessarily mean Intel intends to compete directly with Samsung, SK hynix, and Micron by building conventional DDR5 or future DDR6 chips. A more plausible direction based on Tan's comments is developing memory technologies and integration architectures optimized around Intel Foundry, CPUs, AI accelerators, and advanced packaging. This could include vertically stacked memory, new interfaces, specialized memory architectures, or technologies positioned between conventional DRAM and today's HBM implementations. This interpretation remains an inference rather than an announced Intel product strategy.

Intel is already connected to several experimental memory concepts. Z Angle Memory, commonly known as ZAM, is being explored as a future high density and high bandwidth architecture for AI and HPC systems, while the broader industry is investigating alternatives that can overcome the increasing power, bandwidth, packaging, and density limitations surrounding conventional memory. Intel's ZAM development is especially relevant because it demonstrates that the company is already examining technologies beyond traditional DRAM scaling as AI systems encounter increasingly severe memory bottlenecks.

The timing is also important. Tan has already identified memory as the largest immediate shortage affecting AI infrastructure, with demand for HBM, server DRAM, and increasingly large memory pools expanding alongside GPUs, CPUs, accelerators, and AI factories. Samsung, SK hynix, and Micron are directing enormous resources toward HBM and high capacity server products, while conventional DRAM supply remains constrained enough that SK hynix has begun adjusting some production toward mainstream DDR5.

For Intel Foundry, memory integration could become strategically important beyond simply selling memory chips. Future AI processors increasingly depend on advanced packaging that combines compute dies, cache, memory, networking, and specialized accelerators inside tightly integrated packages. Intel already offers technologies such as EMIB and Foveros, and the company said Lee's organization will prepare advanced packaging technologies including EMIB T and HBI for high volume manufacturing. Adding stronger memory technology or intellectual property could give Intel another way to differentiate its foundry platform rather than competing solely on transistor density.

The distinction remains important: Intel has not confirmed that it is restarting a traditional DRAM manufacturing business. Tan has confirmed that the company is studying new memory architectures and CPU memory stacking, and his comments alongside the hiring of Seok Hee Lee suggest that memory has become significantly more important inside Intel's long term technology strategy. Whether that ultimately becomes Intel branded memory silicon, foundry manufacturing for memory partners, proprietary stacked memory, or a broader system integration platform has not yet been disclosed.

Intel returning to conventional commodity DRAM would require enormous investment and would place the company directly against Samsung, SK hynix, Micron, and increasingly aggressive Chinese manufacturers. That may not be where the real opportunity lies. The more interesting possibility is Intel combining its processor architecture, foundry technology, advanced packaging, and new memory designs into a vertically integrated AI platform.

The AI industry is increasingly running into a memory wall where adding more compute does not automatically improve performance if processors cannot receive data quickly enough. If Intel can develop an architecture that places significantly more memory bandwidth and capacity close to its CPUs or accelerators while reducing power consumption and packaging complexity, memory could become a differentiator for Intel Foundry rather than simply another product category. Seok Hee Lee's appointment makes that direction considerably more interesting, but Intel still needs to reveal what Tan's memory project actually is before this can be considered a genuine return to memory manufacturing.

Should Intel return to manufacturing its own memory, or would the company be better positioned developing new stacked memory architectures specifically for CPUs, AI accelerators, and Intel Foundry customers?