Intel’s EMIB T Yield Progress Could Decide Google’s Next TPU Packaging Bet, Analyst Says

Intel’s advanced packaging push is drawing renewed attention after analyst Ming Chi Kuo said EMIB T yields could become a major factor in whether Google places future TPU packaging orders with Intel. In his post on X, Kuo said Intel’s in development EMIB T technology has reached about 90% technical validation yield, which he described as a positive and reasonable signal, but he also cautioned that the real benchmark for mass production is much higher. Reports summarizing his view say the comparison point is around 98%, based on the kind of production expectations typically associated with FCBGA style package assembly, which makes the remaining yield climb far more challenging than the initial path to 90%.

閒聊 Intel EMIB-T 封裝的 2H27 新款 Google TPU（Humufish）。以下根據我的產業調查：

【EMIB-T 90% 良率，該怎麼看？】

1. 基於 Intel 已經有穩定生產 EMIB 的經驗，開發中的 EMIB-T 技術驗證良率達到 90%，是很正向但也合理的訊號。

2. Intel 把 FCBGA 設定為 EMIB…

— 郭明錤｜Ming-Chi Kuo (@mingchikuo) May 3, 2026

That distinction is the heart of the story. A 90% technical validation yield sounds strong on paper, but it is not the same as proven high volume manufacturing yield. Kuo’s argument is that moving from 90% to 98% is not a minor final optimization step. It is the hard part, especially for a packaging technology that Google would need to trust for large scale TPU deployment. If Intel cannot close that gap, then EMIB T risks looking promising in demos while still falling short of the consistency hyperscale customers expect in production.

On the technology side, Intel’s packaging case is easy to understand. Standard EMIB, or Embedded Multi die Interconnect Bridge, uses silicon bridges embedded directly in the package substrate instead of a full silicon interposer. Intel says EMIB has been in high volume manufacturing since 2017 and positions it as a lower complexity and lower cost 2.5D interconnect approach. EMIB T is the more advanced evolution, adding through silicon vias into the bridge so power and signals can move both laterally and vertically, which is especially important for HBM4 class accelerators and very large AI packages.

That is why Google is even part of this discussion. Multiple reports over the past month have said Google is evaluating Intel’s advanced packaging for future TPU programs, partly because Intel’s EMIB and EMIB T could offer a meaningful cost advantage versus more traditional interposer based packaging such as CoWoS. Kuo also said Google is looking hard at cost reduction options because it needs to stay competitive with NVIDIA in AI infrastructure economics. In that context, packaging is no longer just a backend detail. It becomes a strategic lever that can affect both performance and total system cost.

Kuo’s comments also point to a wider supply chain issue. He said Google has even explored whether TSMC could directly tape out the main design for its Humufish TPU rather than relying on MediaTek as an intermediary, which shows how aggressively Google is looking for ways to control costs and streamline execution. That makes Intel’s packaging yield story more than a technical footnote. If EMIB T proves manufacturable at a competitive level, it could help Intel win meaningful advanced packaging business from one of the biggest AI infrastructure buyers in the world. If not, Google still has other paths.

The broader market context makes this even more important for Intel. TrendForce recently noted that Intel’s packaging efforts are being watched closely as a potential challenger to TSMC’s dominance in advanced AI packaging, especially while CoWoS capacity remains tight. Intel has also been expanding its packaging footprint through New Mexico, Malaysia, and partner relationships, while publicly arguing that advanced packaging may become just as important as silicon leadership in the AI era. That means EMIB T is not only about one Google order. It is a test of whether Intel can turn packaging into a real foundry advantage while its process roadmap is still under pressure.

For now, cautious optimism is the right read. Intel’s 90% validation yield is clearly a meaningful milestone, and the company already has real EMIB manufacturing experience behind it. But Google’s TPU business is unlikely to hinge on promise alone. If EMIB T is going to become a genuine CoWoS alternative for hyperscale AI chips, Intel will need to prove that the last stretch toward production grade yield is not just possible, but repeatable at scale.

What do you think matters more for Google’s next TPU generation, lower packaging cost or absolute confidence in mature, high yield advanced packaging?