Intel Johnson City Platform Validates 650W Support for Next Generation Diamond Rapids Xeon CPUs
Intel’s next wave of high performance datacenter silicon is taking clearer shape as new shipment logs reveal key details regarding the Johnson City evaluation platform designed for the upcoming Diamond Rapids Xeon processors. The discovery, sourced from the NBD shipment database and further highlighted by x86deadandback on X, indicates that Intel is validating exceptionally high power envelopes reaching up to 650W for its next generation flagship CPUs.
Intel Core Ultra 338H & 368H are coming!
— X86 is dead&back (@x86deadandback) November 23, 2025
The world's first GAAFET & BSPDN processors! pic.twitter.com/uMwg4wBarg
The platform is labeled internally as the JNC Server Board, where JNC stands for Johnson City, Intel’s reference environment for evaluating Diamond Rapids capabilities, performance characteristics, and multi socket configurations. The listings are marked as Validation Material, underscoring that these are pre production assets used by Intel and ecosystem partners for rigorous platform enablement.
Two key entries stand out. The first references 1SPC 500 DMR, which appears to point toward a 500W TDP class for certain Diamond Rapids SKUs. The second explicitly lists 650W, confirming that Intel is testing extremely high power configurations, likely tied to the top end, ultra high core count variants. Another listing mentions a JNC Multi S platform, noted as 2+1+1S, a designation commonly used to reference multi socket or multi chiplet configurations that Diamond Rapids is expected to support.
From existing industry reports, Intel’s Diamond Rapids Xeon lineup is anticipated to scale up to 192 cores, with persistent rumors suggesting potential variants reaching 256 cores, though Intel has not confirmed those upper bounds. The architecture will leverage Panther Cove P cores and the company’s cutting edge 18A process node, positioning Diamond Rapids as Intel’s most advanced server platform to date.
Memory configuration expectations have also shifted. It is now believed that Xeon 7 Diamond Rapids processors will only ship in 16 channel memory configurations, abandoning mainstream 8 channel support. While this represents a platform realignment, analysts suggest the change may be tied to optimizing bandwidth and power efficiency for high density AI and HPC workloads. After Diamond Rapids, Intel’s roadmap leads to Coral Rapids, which Intel CEO Lip Bu Tan previously confirmed will reintroduce SMT support.
The hardware requirements supporting these core counts and architectural advancements are immense. Diamond Rapids will utilize the enormous LGA 9324 socket, dwarfing both consumer LGA 1700 and even the enterprise class LGA 7529 socket used by Granite Rapids. This larger socket allocation suggests higher pin density, expanded memory signals, and robust power delivery for sustained workloads.
While Intel has not yet provided a public launch timeline, current projections point to a 2026 release window, likely in the second half of the year. When it arrives, Diamond Rapids will directly compete with AMD’s upcoming EPYC Venice platform, setting the stage for another round of high performance server compute rivalry.
What do you think about Intel validating 650W server CPUs? Is this the new normal for AI era datacenter processors? Share your thoughts below.
