TSMC Says A14 Development Is on Track as Risk Production Begins in 2027

TSMC has confirmed that development of its next generation A14 process is progressing as planned, with risk production scheduled to begin in 2027 and volume manufacturing expected in 2028. The update provides stronger evidence that the company’s 1.4nm class technology is advancing without major development setbacks as customer interest grows across smartphones, artificial intelligence, and high performance computing.

During TSMC’s latest quarterly earnings call, Chairman and CEO C.C. Wei said an internal product like test vehicle had reached close to 90% of its targeted device performance and close to 90% yield on a 256 Mb SRAM design. Customer engagement is reportedly strong, while new A14 tape out activity is already progressing ahead of schedule.

Compared with TSMC’s N2 process, A14 is expected to deliver between 10% and 15% higher performance at the same power consumption, or between 25% and 30% lower power consumption at the same performance level. The process is also projected to provide close to a 20% improvement in chip density. TSMC describes A14 as its second generation nanosheet transistor platform and is expanding its NanoFlex architecture into NanoFlex Pro to give customers additional flexibility when balancing performance, power efficiency, and chip density.

The confirmed schedule supports previous coverage of TSMC’s A14 facility, which reported that the company was preparing a major manufacturing complex in Taichung for 1.4nm class production. The project reinforces Taiwan’s position as TSMC’s primary location for its most advanced process technologies while the company continues expanding manufacturing capacity in the United States, Japan, and Europe.

TSMC has not identified which customer will introduce the first commercial A14 processor. Apple, NVIDIA, AMD, Qualcomm, and MediaTek are widely expected to evaluate the process for future products, but no company has publicly confirmed an A14 design. Claims that Apple will use the technology for a future A22 Pro processor should therefore remain classified as speculation rather than an established product roadmap.

A14 will also provide the foundation for 2 additional technologies scheduled for 2029. A13 will use a 97% optical shrink to reduce die area by more than 6% compared with A14, while maintaining backward compatible design rules to simplify the migration of intellectual property and existing chip designs. A12 will introduce TSMC’s Super Power Rail backside power delivery technology to the A14 platform, targeting additional improvements in performance, efficiency, and chip density for artificial intelligence and high performance computing processors.

TSMC believes A14 and its A13 and A12 derivatives could become a larger and longer lasting process family than N2. This strategy allows customers to reuse more of their design investments while selecting different process variants for mobile processors, data center accelerators, graphics products, and other demanding computing applications.

Samsung remains TSMC’s closest direct competitor within the 1.4nm class foundry race, but its current schedule places SF1.4 volume production in 2029. Samsung is also planning an enhanced SF1.4 Plus process for 2030, giving TSMC a potential 1 year production advantage if both companies maintain their current roadmaps. However, commercial leadership will ultimately depend on manufacturing yields, wafer pricing, available capacity, packaging support, and the number of major customers each foundry can secure.

TSMC’s latest update is more meaningful than a simple confirmation that A14 remains on schedule. Reaching close to 90% SRAM yield and device performance at this stage suggests that experience gained from N2 nanosheet manufacturing is carrying forward into the next process generation.

The larger strategic development is TSMC’s decision to build an extended A14 family rather than relying on a single process. A13 gives mobile and consumer chip designers a more compact migration path, while A12 adds backside power delivery for processors where power density and sustained performance matter more than cost.

For future gaming hardware, these technologies could enable faster CPUs, larger GPUs, improved efficiency, and more advanced artificial intelligence acceleration. However, smaller process naming alone does not guarantee affordable products. Rising wafer costs, advanced packaging requirements, memory pricing, and increasingly complex chip designs will continue influencing what consumers ultimately pay.

Do you think TSMC’s A14 roadmap will deliver a meaningful performance leap for future gaming and artificial intelligence hardware, or are rising manufacturing costs becoming a greater concern than transistor scaling?