TSMC Skips High-NA EUV for A14 (1.4nm) Process, Citing Cost Efficiency; Intel Foundry Now Holds Technological Edge
In a strategic move that signals a shift in priorities, Taiwan Semiconductor Manufacturing Company (TSMC) has confirmed it will not adopt high-numerical aperture (High-NA) extreme ultraviolet (EUV) lithography for its upcoming A14 (1.4nm) node, set to enter production in 2028. This decision was announced during the company’s North America Technology Symposium, where TSMC’s Senior Vice President Kevin Zhang explained the rationale behind relying on the more mature 0.33-NA EUV technology. The decision has surprised many, particularly because TSMC has long been seen as the semiconductor industry's innovation leader.
According to Zhang via Bist & Chips, the A14 node will retain processing complexity on par with previous generations but will not require the costly transition to High-NA EUV. He stated, "From 2 nanometers to A14, we don’t have to use high-NA, but we can continue to maintain similar complexity in terms of processing steps. Each generation of technology, we try to minimize the number of mask increases. This is very important to provide a cost-efficient solution."
The High-NA EUV tools, which offer significantly greater resolution and precision, come with a staggering cost—estimated at up to 2.5 times more than traditional EUV. Beyond the cost of the equipment itself, High-NA also introduces higher mask counts per layer, driving up complexity and production expenses. For TSMC, which manufactures at massive scale for a broad customer base, these added costs could pose a barrier to widespread adoption of its next-generation process. Instead, the company will rely on multi-patterning with 0.33-NA EUV to maintain its technological edge without escalating prices.
This approach does not mean TSMC is abandoning High-NA EUV altogether. The company has stated that it plans to integrate the technology into its A14P node, which is projected for a 2029 rollout. But by skipping High-NA for A14, TSMC effectively delays its adoption by several years—especially compared to Intel Foundry.
Intel, which has already committed to implementing High-NA EUV for its 18A process as early as 2025, now finds itself ahead of TSMC in terms of lithography advancements. In the competitive world of semiconductor manufacturing, where performance-per-watt and transistor density reign supreme, Intel’s earlier use of High-NA could give it a significant advantage in pushing architectural boundaries and performance improvements.
Additionally, several DRAM manufacturers are also reported to be moving faster toward High-NA integration, further isolating TSMC in the race for sub-2nm leadership. Still, TSMC’s decision is not without merit: its business model depends on a delicate balance of performance, yield, and production economics. By choosing cost-efficiency over rapid lithography advancement, the firm aims to ensure broad market accessibility for its A14 chips.
Whether this pragmatic approach will hinder TSMC’s competitive positioning in the long term remains to be seen. For now, it underscores a growing divergence in the strategies of the world’s top semiconductor manufacturers, and with Intel doubling down on advanced tools, the race into the Angstrom Era is heating up.
Do you think TSMC made the right move prioritizing cost efficiency over cutting-edge lithography for A14, or should it have adopted High-NA EUV sooner like Intel? Share your thoughts below.
